Wafer Bumping at Pac Tech    


Pac Tech offers subcontractor wafer bumping services for both Flip Chip and WLCSP applications.  Pac Tech has four manufacturing sites around the world which offer these services.  Our goal is to customer oriented and flexible enough to meet all your bumping needs.  We with customers on prototyping, engineering, and R&D projects as well bump wafers in high volumes.  Each site has the capabilities to bump over 300,000 wafers per year.

Pac Tech uses an electroless nickel plating process to deposit the Under-Bump-Metallurgy (UBM) and three different technologies to deposit the solder:

1)   Single Sphere Laser Jetting using the SB2 tool.
2)   Solder Sphere Transfer using the Ultra-SB2.
3)   Paste prinnting using standard surface mount printers and metal stencils.

The choice between these three solder deposition technologies is based on product type, bump height requirements, pad pitch, and volumes to be bumped.

  Sphere Jetting (SB2) Sphere Transfer (Ultra SB2) Paste Printing
(Stencil)
Product Types
Prototype Wafers
Low I/O Count Wafers
Low Volume Wafers for Medical
Low Volume Wafers for Military
Low Volume ASIC Wafers
Probe Cards
MEMS
Hard Disc Drives

 High Volume Bumping
High I/O Applications
High yield applicatins		 Low Cost Bumping
Solder Bump Height 60 to 500um 60 - 500 um 80-300um
Smalless Bump Pitch 80um 80um 200um
Throughput 10 bumps per second 25-30 wafers/hr 25-35 wafers/hour

The standard process flow used at all four Pac Tech manufacturing sites is:

1) Incoming logistics: unpackage and prepare work instructions
2) Incoming wafer inspection
3) Electroless Nickel UBM deposition (see e-Ni section of this web site for more details)
4) Flux and Solder deposition (one of three methods described above)
5) Reflow
6) Wafer clean
7) Metrology (bump shear, bump height, yield inspection,...)
8) Outgoing wafer inspection
9) Outgoing logistics: package and submit paperwork (reports, data files, ...)

Flip Chip Bumping and WLCSP Bumping Overview:

Wafer bumping is often separated into two different categories: flip chip bumping (FC) and wafer level chip scale packaging (WLCSP). This categorization and affiliated nomenclature is partially based on the solder bump size and the type of equipment used to create the bump.

"Flip Chip" refers to bumps on semiconductor wafers which are in the range of 50 to 200 µm in height and are usually assembled using and underfill material between the die and the substrate.

"WLCSP" refers to bumps that are in the range of 200 to 500 µm in height and are usually assembled without and underfill material.

The basic flow for each of these technologies is to first deposit a barrier metal on top of the bond pad of the wafer (Under-Bump Metallization or UBM) followed by deposition of the solder.

 →       →   
Wafer Bond Pads e-Ni/Au Plated UBM Solder Deposition



The process flow for the three different solder deposition techniques that are used by Pac Tech are shown below:

Sphere Jetting
(SB2)		 Sphere Transfer
(Ultra SB2)		 Paste Printing
(Stencil)

Jet Solder and Reflow

Turn on Vacuum and Pick Up Solder Spheres

Align Stencil to Wafer

Remove Wafer

Align Head to Pre-Fluxed Wafer

Print Solder Paste

 


Lower Sphere onto Wafer

Raise Stencil

 


Release Vacuum and Raise Head

Reflow

 

 

 

Reflow

 

Common solder alloys offered by Pac Tech include:

SnAgCu (SAC305 & SAC105)
SnAg
PbSn 10
AuSn 80/20