Die Sort

After sawing the wafer into individual die, the die often times need to be picked from the sawing tape and placed into either, Waffle Packs, Gel Packs, or inserted into Tape and Reel pockets. Pac Tech has the capabilities to perform all of these operations either manually for low volume applications or fully automatic for high volume applications.

The die are peeled from the tape and manually loaded in die trays. Die are carefully peeled from the wafer tape and deposited on a special handling film utilizing a die-tape separator. An operator then moves the die from the film to the appropriate carrier utilizing a vacuum pencil.

In automated process, the wafer remains on the ring frame and is loaded onto the pick and place equipment. As it is clamped into place, the tape is stretched to increase the space between each die. The carriers are loaded onto the discharge fixture of the machine. Eject pins push up through the wafer tape to elevate the die and loosen it from the tape. The vacuum pickup arm retrieves the die and deposits the die in the carrier. The machine is programmed to recognize ink dots left on the surface of the die during the wafer probe and visual inspection operations. Electronic maps can be used to identify rejected dies.

Wafer	Material:	Si, GaAs, SiGe, InP, LiTaO3, Ceramics, Laminates, Glass, Quartz
	Size:	100 mm	125 mm	150 mm	200 mm	300 mm
	Thickness: Standard Special	200-550 mm 100-200 mm	200-650 mm 100-200 mm	200-700 mm 100-200 mm	200-750 mm 100-200 mm	350-800 mm 200-350 mm
	Backside: Standard Special Special	Thermal Oxide, SiO2, Polymer Metallized (e.g. TiNiAg, Au, etc…) require a protective resist or laminate Ground (thinned) normally requires a protective resist or laminate
	Quality:	No Chips

Pad	Metallurgy	Cu	AlCu		AlSiCu		Ni
	Thickness: Flip Chip *WLCSP Wirebond	>0.25 µm >0.25 µm >0.25 µm	>0.8 µm >1.5 µm >0.8 µm		>0.8 µm >1.5 µm >0.8 µm		>0.25 µm >0.25 µm >0.25 µm
	Pad Geometries:	Circular		Octagonal		Square
	Pad Size: Standard Special	>40 µm diameter <10 µm diameter		>40 µm x 40 µm <10 µm x 10 µm		>20 µm x 20 µm <10 µm x 10 µm
	Pitch:	Pad to Pad distance must be > 2 x Nickel Height + 10 µm
	Quality:	Free of organic and silicon base contaminates

Die	Dicing Streets:	Doped Si must be isolated (by thermal oxide), can be protected by resist Exposed test pads and structures will plate, can be protected by a resist
	Probe Marks:	Acceptable (if < ¼ of pad size) must not penetrate Al or Cu pad
	Ink Dots:	Hard cured epoxy inks are usually acceptable Stability of ink must be evaluated
	Fuse Links: Al fuses poly Si fuses	Aluminum: Must be protected by a resist Polysilicon: Unblown are usually acceptable, these may require a resist
	Quality:	Passivation pin holes will require a resist coating to prevent plating

Incoming Wafer Requirements: